NXP Semiconductors /LPC408x_7x /PWM0 /CTCR

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Interpret as CTCR

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (TIMER_MODE_THE_TC_I)MOD0 (FOR_PWM0_00_EQ_PWM0_)CIS0RESERVED

MOD=TIMER_MODE_THE_TC_I, CIS=FOR_PWM0_00_EQ_PWM0_

Description

Count Control Register. The CTCR selects between Timer and Counter mode, and in Counter mode selects the signal and edge(s) for counting.

Fields

MOD

Counter/ Timer Mode

0 (TIMER_MODE_THE_TC_I): Timer Mode: the TC is incremented when the Prescale Counter matches the Prescale register.

1 (RISING_EDGE_COUNTER_): Rising edge counter Mode: the TC is incremented on rising edges of the PWM_CAP input selected by bits 3:2.

2 (FALLING_EDGE_COUNTER): Falling edge counter Mode: the TC is incremented on falling edges of the PWM_CAP input selected by bits 3:2.

3 (DUAL_EDGE_COUNTER_MO): Dual edge counter Mode: the TC is incremented on both edges of the PWM_CAP input selected by bits 3:2.

CIS

Count Input Select. When bits 1:0 are not 00, these bits select which PWM_CAP pin carries the signal used to increment the TC. Other combinations are reserved.

0 (FOR_PWM0_00_EQ_PWM0_): For PWM0: 00 = PWM0_CAP0 (Other combinations are reserved) For PWM1: 00 = PWM1_CAP0, 01 = PWM1_CAP1 (Other combinations are reserved)

RESERVED

Reserved. Read value is undefined, only zero should be written.

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